A Design Approach to Creating Scalable Video Processing Systems beyond UHDTV1 on an FPGA

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Publisher: SMPTE — White Plains, NY, USA
Doc Type: Journal Article
Content Type: Original Research
Abbreviated Title: SMPTE Mot. Imag. J
Volume: 123, No. 4, pp. 39–49
Abstract: An unquenchable end-user thirst for enhanced video quality results in ever-scaling video frame size and frame rate requirements. As we move from UHDTV1 to UHDTV2 and 120 frames/sec to 300 frames/sec, inevitably the computational complexity of video processing systems required to consume, process, and deliver video content increases. The need for solutions to support combinations of frame sizes and rates, as well as future increments, emphasizes the need for system scalability. The computational complexity and scalability requirements pose exciting challenges for field-programmable gate array (FPGA) implementation of video processing pipelines. This paper presents implementation techniques and methodologies to overcome these challenges. We specifically concentrate on architectures whereby the input per-pixel video sample rate exceeds the system clock rate. Novel results include classifying pixel processing orders and presenting a component-based design approach for future-proofing video processing solutions against an ever-scaling computational complexity requirement. Resource and memory bandwidth requirements of such systems are also analyzed and trends are presented.
Publication Date: 2014-05-01
DOI: 10.5594/j18415
ISSN: Print: 1545-0279
Link: https://doi.org/10.5594/j18415
Author(s): Benjamin Cope
David Shih
Copyright: © 2014 Society of Motion Picture and Television Engineers, Inc.

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Benjamin Cope and David Shih; A Design Approach to Creating Scalable Video Processing Systems beyond UHDTV1 on an FPGA, SMPTE Motion Imaging Journal ( Volume: 123, Issue: 4, May 2014); SMPTE, 2014. Available at https://doi.org/10.5594/j18415

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Benjamin Cope and David Shih; A Design Approach to Creating Scalable Video Processing Systems beyond UHDTV1 on an FPGA, SMPTE Motion Imaging Journal ( Volume: 123, Issue: 4, May 2014); SMPTE, 2014. Available at https://doi.org/10.5594/j18415

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<span class="citation">Benjamin Cope and David Shih; <cite>A Design Approach to Creating Scalable Video Processing Systems beyond UHDTV1 on an FPGA</cite>, SMPTE Motion Imaging Journal ( Volume: 123, Issue: 4, May 2014); SMPTE, 2014. Available at <a href="https://doi.org/10.5594/j18415" target="_blank" rel="noopener">https://doi.org/10.5594/j18415</a></span>

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Benjamin Cope and David Shih; <cite id="bib-10-5594-j18415">A Design Approach to Creating Scalable Video Processing Systems beyond UHDTV1 on an FPGA</cite>, SMPTE Motion Imaging Journal ( Volume: 123, Issue: 4, May 2014); SMPTE, 2014
<span class="doi">10.5594/j18415</span>
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