SMPTE 425 — Bit-Serial Interfaces at 3 Gb/s
SMPTE suite · 7 parts · has active base · stabilized
Base document
Source Image Format and Ancillary Data Mapping for the 3 Gb/s Serial Interface
| Part | Document | Status | Publication Date |
|---|---|---|---|
| — | Source Image Format and Ancillary Data Mapping for the 3 Gb/s Serial Interface | Superseded | — |
| 0 | Roadmap for the 425 Document Suite The SMPTE 425 suite of documents defines the mapping of various source image formats onto a single link, dual link and quad link serial digital interfaces operating at a nominal rate of 3 Gb/s. This informative “roadmap” describes the documents in the SMPTE 425 suite. The SMPTE…The SMPTE 425 suite of documents defines the mapping of various source image formats onto a single link, dual link and quad link serial digital interfaces operating at a nominal rate of 3 Gb/s. This informative “roadmap” describes the documents in the SMPTE 425 suite. The SMPTE 425 series documents specify a virtual interface that is carried on a physical link specified by SMPTE ST 424. | Active | 2014-02-20 |
| 1 | Source Image Format and Ancillary Data Mapping for the 3 Gb/s Serial Interface | Active | 2017-10-23 |
| 2 | Source Image Format and Ancillary Data Mapping for Stereoscopic Image Formats on a Single-Link 3 Gb/s Serial Interface | Active · Stabilized | 2012-02-03 |
| 3 | Image Format and Ancillary Data Mapping for the Dual Link 3 Gb/s Serial Interface | Active | 2019-03-04 |
| 4 | Dual 3 Gb/s Serial Digital Interface for Stereoscopic Image Transport | Active | 2012-07-03 |
| 5 | Image Format and Ancillary Data Mapping for the Quad Link 3 Gb/s Serial Interface | Active | 2019-03-04 |
| 6 | Quad 3 Gb/s Serial Digital Interface for Stereoscopic Image Transport | Active | 2014-02-20 |