A New Multiplier-Adder LSI for Digital Video Processing

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Publisher: SMPTE — White Plains, NY, USA
Doc Type: Journal Article
Content Type: Original Research
Abbreviated Title: J SMPTE
Volume: 93, No. 9, pp. 830–835
Abstract: This article describes a new multi-purpose complementary metal oxide semiconductor (C-MOS) multiplier-adder large-scale integrated circuit (LSI), the CX-7997, developed for digital video processing. Employing pipeline structure and C-MOS technology, the LSI has an operating clock-rate sufficient for video processing, but has the advantage of low power consumption. The design concept, examples of application, and results of some experiments with the CX-7997 are discussed.
Publication Date: 1984-09-01
DOI: 10.5594/J03479
ISSN: Print: 0036-1682
Link: https://doi.org/10.5594/J03479
Author(s): Seiichiro IwaseSony Corp., Kanagawaken, Japan.
Ichiro KumataSony Corp., Kanagawaken, Japan.
Yoshitaka HashimotoSony Corp., Kanagawaken, Japan.
Copyright: © 1984 Society of Motion Picture and Television Engineers, Inc.

Bibliographic Reference(s)

1. Hashimoto Y. , “Digital Decoding and Encoding of the NTSC Signal at 912 Samples per Line,” SMPTE J. , Oct. 1981 , pp. 942 – 944 . EXTERNAL

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Seiichiro Iwase, Ichiro Kumata, and Yoshitaka Hashimoto; A New Multiplier-Adder LSI for Digital Video Processing, SMPTE Journal ( Volume: 93, Issue: 9, September 1984); SMPTE, 1984. Available at https://doi.org/10.5594/J03479

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Seiichiro Iwase, Ichiro Kumata, and Yoshitaka Hashimoto; A New Multiplier-Adder LSI for Digital Video Processing, SMPTE Journal ( Volume: 93, Issue: 9, September 1984); SMPTE, 1984. Available at https://doi.org/10.5594/J03479

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<span class="citation">Seiichiro Iwase, Ichiro Kumata, and Yoshitaka Hashimoto; <cite>A New Multiplier-Adder LSI for Digital Video Processing</cite>, SMPTE Journal ( Volume: 93, Issue: 9, September 1984); SMPTE, 1984. Available at <a href="https://doi.org/10.5594/J03479" target="_blank" rel="noopener">https://doi.org/10.5594/J03479</a></span>

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<li>
Seiichiro Iwase, Ichiro Kumata, and Yoshitaka Hashimoto; <cite id="bib-10-5594-j03479">A New Multiplier-Adder LSI for Digital Video Processing</cite>, SMPTE Journal ( Volume: 93, Issue: 9, September 1984); SMPTE, 1984
<span class="doi">10.5594/J03479</span>
</li>